Adding custom extensions means taking ownership of both hardware design and the corresponding software toolchain.

RISC-V, which was born a decade ago in a laboratory at the University of California at Berkeley, an academic effort of professors David Patterson and Krste Asanović, is basically the Linux of ...

Linux head honcho Linus Torvalds has put a kernel developer "on notice" for waiting until the eleventh hour to supply a patch ...

RISC-V is an instruction set architecture for processors that offers innovative operational mechanisms. Learn about its background and the advantages it brings.

RISC-V International asks vendors to voluntarily disclose usage, but does not compel such disclosure. For that reason, "It'll be hard to see concrete evidence" of the extent of RISC-V usage, said ...

RISC-V is advancing in high-performance computing, with new server processors optimized for AI, video streaming, and cloud applications, supported by cloud providers like Scaleway Labs.

The submission, made late in the Linux 6.17 merge window, aimed to introduce new features for RISC-V. However, Torvalds ...

So Krste Asanovic (a founder of SiFive), Andrew Waterman, Yunsup Lee, and David Patterson created RISC-V. They built their first chip in 2011. In 2014, they announced it and gave it to the community.

They’ve developed the VEGAboard, a dev board with two RISC-V chips and Arduino-style pin headers. The VEGAboard comes loaded with an NXP chip which combines an ARM Cortex-M0 and Cortex-M4.

All this is entertaining stuff, but it becomes of much more interest when viewed as part of an ongoing chain of projects working on no-MMU Linux for low-end RISC-V microcontrollers.

RISC-V on Android will be a long journey. Credit: Lars Bergstrom One of Bergstrom's slides featured the above "to-do" list, which included a ton of major Android components.

HiFive Unmatched: RISC-V Development Ready At $665, the HiFive Unmatched from SiFive isn’t a mainstream single board PC or hobbyist curiosity.